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Power-Sensitive 65nm Designs Increase the Need for Transistor-Level Verification
Designers can verify AMS designs by employing a hierarchical methodology that can directly consume digital and analog blocks in their native modeling languages. Details... more...
Power/Signal integrity drives successful electronic product design
As the pursuit of increased performance and lower cost continue, product design trends fo
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r chips, packages and boards pose evermore severe power integrity (PI) and signal integrity (SI) challenges. Details... more...
Gauging standard-cell performance
Standard-cell-based design has become the mainstream methodology for designing the digital-logic sections of ASICs. Details... more...