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Scale voltage to manage power consumption
As CMOS process technologies migrate from 90nm to 65nm and below and as chip densities increase, static and dynamic power consumption often rise above acceptable levels. Apply voltage-scaling techniques to manage both. Details... more...
Manage circuit board power with PLDs
This article proposes a design solution to the complex power management problem in circuit board design: the use of a programmable, mixed-signal power management device. Details... more...
Design Ideas run the gamut from analog to digital to CPLDs
The Power Integrations Topswitch family of integrated flyback-regulator ICs provides exceptional performance in small, low-pincount packages. Thi... Details... more...