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NEC launches power management chip line in the U.S.
NEC recently expanded its product offering in the Americas to include highly integrated power management ICs (PMICs). Details... more...
Utilizing Clock - Gating Efficiency to Reduce Power
Clock gating can be applied at multiple levels of abstraction, but RTL is the most effective point in the design process. Measuring clock-gating efficiency is an accurate guide to power optimization because it takes into account switching activity. RTL designers can use clock-gating efficiency to pinpoint hotspots and concentrate their optimization efforts. Details... more...
200 - V audio power amp input stages deliver low distortion
The LME49811 and LME49830 200-V mono high-fidelity audio power amplifier input stages from National Semiconductor reduce component count, offer scalable output power and enable amplifier designs with a THD+N as low as 0.00035%. Details... more...