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Programmable bridge offers low power, small footprint
When implemented in a LatticeSCM-15E FPGA packaged in a space-saving 256 fine pitch Ball Grid Array (fpBGA) package, the new programmable bridge from Lattice Semiconductor requires 17mm x 17mm on a PCB while consuming 2.5W of power. Details... more...
S3 tips 65nm mixed-signal IP chip
S3 has taped out and received silicon from the 65nm version of its licensable mixed-signal IP. Details... more...
QNX opens Neutrino source code, development process
In a surprising move, QNX Software Systems announced it is opening access to the source code of its QNX Neutrino RTOS. Details... more...