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FPGA - design environment squeezes power consumption
FPGA - design environment squeezes power consumption
EDA tools for FPGAs and ASICs commonly include optimization capabilities for timing and gate efficiency, but Actel claims that its new Libero Version 8.1 package is the first FPGA development tool to include low-power-optimization capability.
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2007-11-19 09:51:10
 
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